The FPGA of the Veterinary Ultrasound system is responsible for generating pulse signal sequences and adopts the read-only memory reading method. Pre write the data information of ultrasonic waves with emission patterns into the read-only memory. The veterinary B-ultrasound diagnostic device has designed different buttons according to users' different needs, which can send differentiated pulse frequencies. The ultrasonic signal frequency selected in the design scheme is 20 megahertz, which cannot be used for sampling control by general microcontrollers. Therefore, the veterinary ultrasound system uses FPGA pulse signals to control the working state of the analog-to-digital chip. The output signal of FPGA is obtained by splitting the internal clock signal.

In addition, the time compensated gain signal is also implemented through FPGA, using the read-only memory reading method. Pre measure the frequency points of the time compensation gain curve, and then write the obtained data into the read-only memory. The data information is restored to the time compensation gain curve through analog-to-digital conversion.

The final output characters of the veterinary B-ultrasound diagnostic device should be synchronized with the image, and the characters should include the following: annotations, mouse trajectories, obstetric tables, numbers, and menus. In the design scheme, the obstetrics table, ID, and menu are displayed around the perimeter for ease of operation and to improve the resolution and clarity of the output images.

The principle of writing display drivers for animal B-ultrasound systems is as follows: scanning starts from the top left of the screen, the scanning sequence is from left to right, and from top to bottom. After one scanning cycle is completed, the scanning of subsequent frames is restarted from the top left of the screen, and the cycle continues.

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